1. Field of the Invention
This invention relates to a method and system for maintaining the wafer environment clean during the fabrication of semiconductor devices.
2. Brief Description of Prior Art
In the fabrication of semiconductor devices, contact formation often involves the use of titanium with the formation of titanium silicide taking place. It is known that moisture is a deleterious impurity during titanium silicide formation and anneal processes due to the affinity of titanium for the oxygen with the rapid formation of titanium dioxide. This results in a substantial increase in sheet resistance through the titanium silicide formed. This is exemplified with reference to FIG. 1 which is a cross sectional view of a typical partially fabricated CMOS device having a titanium silicide contact 31 to the n+ moat region, a titanium silicide contact 33 to the p+ moat region and a pair of titanium silicide contacts 35, 37 which are the contacts to the polysilicon gates. High sheet resistance of these titanium silicide contacts will have a detrimental effect on electrical parameters and device speed. It has been found that when these processes are conducted in a rapid thermal processor (RTP), such as, for example, an Applied Materials' Centura RTP, moisture has been found to be present which has led to the above described deleterious effect. The source of this moisture was not determined in the prior art though the causes of such moisture content and/or the reasons for the above described deleterious effects were sought. A typical prior art RTP is shown in FIG. 2 wherein the wafer 1 is disposed in a holder 3 which rotates under a heating lamp 5. Nitrogen is passed over the wafer surface. Beneath the wafer 1 is a gold coated reflector plate 7 to reflect the heat back to the wafer having lift pins 9 which are used to lower or lift the wafer from the holder 3 at the beginning and end of the process. The reflector plate 7 also has embedded therein temperature sensors 11 to measure the temperature in the dead space 13 between the wafer 1 and the reflector plate.